A predictable multiprocessor design flow for streaming applications with dynamic behaviour
conference paper
The design of new embedded systems is getting more and more complex as more functionality is integrated into these systems. To deal with the design complexity, a predictable design flow is needed. The result should be a system that guarantees that an application can perform its own tasks within strict timing deadlines, independent of other applications running on the system. Synchronous Dataflow Graphs (SDFGs) provide predictability and are often used to model time-constrained streaming applications that are mapped onto a multiprocessor platform. However, the model abstracts from the dynamic application behaviour which may lead to a large overestimation of its resource requirements. We present a design flow that takes the dynamic behaviour of applications into account when mapping them onto a multiprocessor platform. The design flow provides throughput guarantees for each application independent of the other applications while taking into account the available processing capacity, memory and communication bandwidth. The design flow generates a set of mappings that provide a trade-off in their resource usage. This trade-off can be used by a run-time mechanism to adapt the mapping in different use-cases to the available resource. The experimental results show that our design flow reduces the resource requirements of an MPEG-4 decoder by 66% compared to a state-of-the-art design flow based on SDFGs.
Topics
DataflowMulti-processorThroughputMappingArt designCommunication bandwidthDesign complexityDesign flowsDynamic applicationsDynamic behavioursMulti-processor platformsMultiprocessor designOther applicationsPredictable designProcessing capacitiesResource requirementsResource usageRuntimesStreaming applicationsSynchronous dataflow graphsData flow analysisEmbedded systemsMappingMotion Picture Experts Group standardsMultiprocessing systemsSystems analysisTelecommunication systems
TNO Identifier
954130
ISBN
9780769541716
Publisher
IEEE
Article nr.
5615547
Source title
13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), 1 September 2010 through 3 September 2010
Pages
548-555
Files
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