Single-Step CMOS Compatible Fabrication of High Aspect Ratio Microchannels Embedded in Silicon
conference paper
This paper presents a new method for the CMOS compatible fabrication of microchannels integrated into a silicon substrate. In a single-step DRIE process (Deep Reactive Ion Etching) a network of microchannels with High Aspect Ratio (HAR) up to 10, can be etched in a silicon substrate through a mesh mask. In the same single etching step, multidimensional microchannels with various dimensions (width, length, and depth) can be obtained by tuning the process and design parameters. These fully embedded structures enable further wafer processing and integration of electronic components like sensors and actuators in wafers with microchannels
TNO Identifier
865843
Article nr.
291
Source title
Presented at the Eurosensors 2017 Conference, Paris, France, 3–6 September 2017
Collation
4 p.
Files
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