Efficient retiming of multirate DSP algorithms
article
Multirate digital signal processing (DSP) algorithms are often modeled with synchronous dataflow graphs (SDFGs). A lower iteration period implies a faster execution of a DSP algorithm. Retiming is a simple but efficient graph transformation technique for performance optimization, which can decrease the iteration period without affecting functionality. In this paper, we deal with two problems: feasible retiming—retiming a SDFG to meet a given iteration period constraint, and optimal retiming—retiming a SDFG to achieve the smallest iteration period. We present a novel algorithm for feasible retiming and based on
that one, a new algorithm for optimal retiming, and prove their correctness. Both methods work directly on SDFGs, without explicitly converting them to their equivalent homogeneous SDFGs. Experimental results show that our methods give a significant improvement compared to the earlier methods.
that one, a new algorithm for optimal retiming, and prove their correctness. Both methods work directly on SDFGs, without explicitly converting them to their equivalent homogeneous SDFGs. Experimental results show that our methods give a significant improvement compared to the earlier methods.
Topics
TNO Identifier
954376
ISSN
02780070
Source
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(6), pp. 831-844.
Publisher
IEEE
Article nr.
6200447
Pages
831-844
Files
To receive the publication files, please send an e-mail request to TNO Repository.