Design procedure for integrated microwave GaAs stacked-FET high-power amplifiers
article
The application of stacked-FETs in power ampli fiers allows for a supply voltage higher than supported by the breakdown voltage of a single transistor. Potential benefits of the increased supply voltage are reduced supply currents and a lower matching ratio at the output of the amplifier. Furthermore, an increased output power per chip area is obtained due to the reduction in passive structures resulting in more area-efficient power combining. In this paper, the procedure for the design of integrated microwave stacked-FET is discussed. Several options for the correct distribution of RF voltage and current swings are investigated and the relationship between the number of stacked transistors and bandwidth is addressed. The procedure is demonstrated by the design of an S-band GaAs stacked-FET containing three transistors. This stacked-FET is applied in an S-band HPA that has a PAE of more than 40% at an output power of 20 W, which is more than twice the output power of any previously reported GaAs stacked-FET HPA.
Topics
Microwave-integrated circuitsNonlinear circuitsPower-integrated circuitsRadio frequency (RF) signalsTransmittersDesignGallium arsenideIII-V semiconductorsMicrowave amplifiersSemiconducting galliumDesign procedureHigh power amplifierPassive structuresPotential benefitsSingle transistorsStacked transistorsSupply currentsSupply voltagesPower amplifiers
TNO Identifier
955110
ISSN
00189480
Source
IEEE Transactions on Microwave Theory and Techniques, 67(9), pp. 3716-3731.
Publisher
Institute of Electrical and Electronics Engineers Inc.
Article nr.
8778700
Pages
3716-3731
Files
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