High performance a-IGZO thin-film transistors with mf-PVD SiO2 as an etch-stop-layer
article
In this work, we report on high-performance bottom-gate top-contact (BGTC) amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) with SiO2 as an etch-stop-layer (ESL) deposited by medium frequency physical vapor deposition (mf-PVD). The TFTs show field-effect mobility (μFE) of 16.0cm2/(V.s), sub-threshold slope (SS -1) of 0.23V/decade and off-currents (IOFF)<1.0pA. The TFTs with mf-PVD SiO2 ESL deposited at room temperature were compared with TFTs made with the conventional plasma-enhanced chemical vapor deposition (PECVD) SiO2 ESL deposited at 300°C and at 200°C. The TFTs with different ESLs showed a comparable performance regarding μFE, SS-1, and IOFF, however, significant differences were measured in gate bias-stress stability when stressed under a gate field of +/-1 MV/cm for duration of 104s. The TFTs with mf-PVD SiO2 ESL showed lower threshold-voltage (VTH) shifts compared with TFTs with 300°C PECVD SiO2 ESL and TFTs with 200°C PECVD SiO 2 ESL. We associate the improved bias-stress stability of the mf-PVD SiO2 ESL TFTs to the low hydrogen content of the mf-PVD SiO 2 layer, which has been verified by Rutherford-Back-Scattering- Elastic-Recoil-Detection technique. Copyright 2014 Society for Information Display.
TNO Identifier
513483
ISSN
19383657
Source
Journal of the Society for Information Display, 22(1), pp. 23-28.
Publisher
Wiley-Blackwell Publishing Ltd
Pages
23-28
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