Dataflow-based multi-ASIP platform approach for digital control applications
conference paper
To provide a good balance between the performance and flexibility of future digital control platforms, we propose an FPGA-based heterogeneous multiprocessor approach, in which the platform is composed of processing elements from a set of parameterizable heterogeneous Application-Specific Instruction-set Processors (ASIPs), connected with an hierarchical interconnect. With a case-study treating two different industrial-scale controllers, we show that a platform generated from our template using only a small library of instantiable ASIP types outperforms an optimized 8-core general-purpose implementation by a factor 4.9 on sampling frequency and reduces IO-delay with 37.5%.
Topics
Performance/programmability trade-offPID controlApplication-Specific Instruction-Set Processors (ASIPs)Digital controlHeterogeneous multiprocessorsIndustrial-scalePerformance/programmability trade-offPlatform approachProcessing elementsSampling frequenciesDigital control systemsMicroprocessor chipsSystems analysisThree term control systemsField programmable gate arrays (FPGA)Informatics
TNO Identifier
485657
ISBN
9780769550749
Article nr.
6628363
Source title
16th Euromicro Conference on Digital System Design, DSD 2013, 4-6 September 2013, Santander, Spain
Collation
4 p.
Pages
811-814
Files
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