Assembly, chip and method of operating
patent
The chip comprises a network of trench capacitors and an inductor, wherein the trench capacitors are coupled in parallel with a pattern of interconnects that is designed so as to limit generation of eddy current induced by the inductor in the interconnects. This allows the use of the chip as a portion of a DC-DC converter, that is integrated in an assembly of a first chip and this--second chip. The inductor of this integrated DC-DC converter may be defined elsewhere within the assembly.
Topics
TNO Identifier
520096
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