Additive manufacturing approaches for stress relief in semiconductor die packaging

conference paper
2012
Zon, C.M.B. van der

Wiel, A. van der

Maalderink, H.H.

Vaes, M.H.E.

Aulbers, A.P.

Vorst, L.T.G. van de

Cate, A.T. ten

Furrer, J.F.

Burssens, J.W.

Chen, J.
Packaging of semiconductor chips, especially MEMS-based, always causes stress on the functional areas of the die causing unpredictable changes in chip performance. As a consequence such devices can only be calibrated individually after complete assembly. Melexis and TNO have developed an approach to reduce significantly packaging stress effects by means of additive manufacturing of the die package. The device is calibrated in a standard package with a standard calibration tool whereas the client specific shape is realized with additive manufacturing afterwards. The placement of a dedicated nozzle onto a SOIC16 package with a silicon pressure sensor illustrates the approach.
Topics
Additive ManufacturingPackaging stressSemiconductor chipsChip scale packages
TNO Identifier
507169
Repository link
https://resolver.tno.nl/uuid:9ed4ed6c-1787-46a4-8922-f3e9205775d6
ISBN
9781467346450
Publisher
IEEE Computer Society
Article nr.
6542066
Source title
2012 4th Electronic System-Integration Technology Conference, ESTC 2012, 17 September 2012 through 20 September 2012, Amsterdam
Files
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