Monolayer dual gate transistors with a single charge transport layer
article
A dual gate transistor was fabricated using a self-assembled monolayer as the semiconductor. We show the possibility of processing a dielectric on top of the self-assembled monolayer without deteriorating the device performance. The two gates of the transistor accumulate charges in the monomolecular transport layer and artifacts caused by the semiconductor thickness are negated. We investigate the electrical transport in a dual gate self-assembled monolayer field-effect transistor and present a detailed analysis of the importance of the contact geometry in monolayer field-effect transistors. © 2010 American Institute of Physics.
TNO Identifier
347305
ISSN
0003-6951
Source
Applied Physics Letters, 96(14)
Article nr.
No.: 143304
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