Increasing the noise margin in organic circuits using dual gate field-effect transistor
article
Complex digital circuits reliably work when the noise margin of the logic gates is sufficiently high. For p-type only inverters, the noise margin is typically about 1 V. To increase the noise margin, we fabricated inverters with dual gate transistors. The top gate is advantageously used to independently tune the threshold voltage.
TNO Identifier
441301
Source
Applied Physics Letters
Files
To receive the publication files, please send an e-mail request to TNO Repository.