A Digital Data Processor for Synthetic Aperture Radar
conference paper
This paper presents a Digital Data Processor (DDP) for Synthetic Aperture Radar (SAR). The DDP captures SAR data at a 1 GHz sample rate and processes data at 350 MB/s. Data reduction is performed by a digital down converter, programmable decimating filter and a fully programmable presummer. The total processing power amounts to 12.6 GOPS/s. Configuration of the DDP on a pulse to pulse basis is achieved by means of a high speed LVDS serial data link capable of transferring up to 500 k messages per second with deterministic timing. The DDP has been implemented on a commercial FPGA digitizer board.
TNO Identifier
220891
Source title
Proceedings of the 4th annual FPGAworld Conference 2007, 13 September 2007, Lund, Sweden
Files
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