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Nag, M. (author), Bhoolokam, A. (author), Smout, S. (author), Willegems, M. (author), Muller, R. (author), Myny, K. (author), Schols, S. (author), Ameys, M. (author), Genoe, J. (author), Ke, T.H. (author), Vicca, P. (author), Ellis, T. (author), Cobb, B. (author), Kumar, A. (author), van der Steen, J.L.P.J. (author), Gelinck, G. (author), Fukui, Y. (author), Obata, K. (author), Groeseneken, G. (author), Heremans, P. (author), Steudel, S. (author)A process to make self-aligned top-gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) on polyimide foil is presented. The source/drain (S/D) region's parasitic resistance reduced during the SiN interlayer deposition step. The sheet resistivity of S/D region after exposure to SiN interlayer deposition decreased to 1.5...article 2015
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Nag, M. (author), Muller, R. (author), Steudel, S. (author), Smout, S. (author), Bhoolokam, A. (author), Myny, K. (author), Schols, S. (author), Genoe, J. (author), Cobb, B. (author), Kumar, A. (author), Gelinck, G. (author), Fukui, Y. (author), Groeseneken, G. (author), Heremans, P. (author)We demonstrated self-aligned amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistors (TFTs) where the source–drain (S/D) regions were made conductive via chemical reduction of the a-IGZO via metallic calcium (Ca). Due to the higher chemical reactivity of Ca, the process can be operated at lower temperatures. The Ca process has the...article 2015
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Nag, M. (author), Obata, K. (author), Fukui, Y. (author), Myny, K. (author), Schols, S. (author), Vicca, P. (author), Ke, T.H. (author), Smout, S. (author), Willegems, M. (author), Ameys, M. (author), Bhoolokam, A. (author), Muller, R. (author), Cobb, B. (author), Kumar, A. (author), van der Steen, J.L. (author), Ellis, T. (author), Gelinck, G.H. (author), Genoe, J. (author), Heremans, P. (author), Steudel, S. (author)We present a QQVGA (160times120 with 3 sub-pixel) top-emitting AMOLED display with 85ppi resolution using a self-aligned (SA) IGZO TFT backplane on polyimide-foil. The back plane process flow is based on a 5 layer photolithography process. The aperture ratio of the top-emitting OLEDs is approx. 25%. For operation at 6 V supply voltage (VDD), the...article 2014
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Fukui, Y. (author), Shibata, M. (author), Tanaka, Y. (author), Okumoto, K. (author), Morita, K. (author), Otake, K. (author), Tripathi, A.K. (author), van der Putten, B. (author), van der Steen, J.L. (author), Tempelaars, K. (author), van Leuken, L. (author), Li, F. (author), Yakimets, I. (author), Gelinck, G.H. (author), Myny, K. (author), Smout, S. (author), Willegems, M. (author), Schols, S. (author), Steudel, S. (author), Genoe, J. (author), Heremans, P. (author)We have developed a full color flexible top-emission AMOLED display with 80 ppi resolution using In-Ga-Zn-O TFT backplane on PEN foil under the maximum process temperature of 150 oC. Notwithstanding the low processing temperature, the TFTs with SiOx passivation layer show high reliability with VTH shift of less than 0.2 V at 10,000 seconds under...article 2013
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van der Steen, J.L.P.J. (author), Tripathi, A.K. (author), Maas, J.P.V. (author), van Diesen-Tempelaars, K. (author), van Leuken, L.B. (author), de Haas, G.J.A.J.F. (author), van der Putten, J.B.P.H. (author), Yakimets, I. (author), Li, F.M.W. (author), Ellis, T.H. (author), van Mol, A.M.B. (author), Gelinck, G.H. (author), Vicca, P. (author), Smout, S. (author), Ameys, M. (author), Huei Ke, T. (author), Steudel, S. (author), Nag, M. (author), Schols, S. (author), Genoe, J. (author), Heremans, P. (author), Fukui, Y. (author), Green, S. (author)We present a low-temperature metal oxide transistor backplane technology using PECVD dielectrics. We show successful integration of the backplane in flexible 200ppi AMOLED displays on ultrathin polymer films. The displays are encapsulated with a thin-film barrier and the total stack thickness is less than 150μm.conference paper 2013