Title
Dataflow-based multi-ASIP platform approach for digital control applications
Author
Frijns, R.M.W.
Kamp, A.L.J.
Stuijk, S.
Voeten, J.P.M.
Bontekoe, M.
Gemei, K.J.A.
Corporaal, H.
Publication year
2013
Abstract
To provide a good balance between the performance and flexibility of future digital control platforms, we propose an FPGA-based heterogeneous multiprocessor approach, in which the platform is composed of processing elements from a set of parameterizable heterogeneous Application-Specific Instruction-set Processors (ASIPs), connected with an hierarchical interconnect. With a case-study treating two different industrial-scale controllers, we show that a platform generated from our template using only a small library of instantiable ASIP types outperforms an optimized 8-core general-purpose implementation by a factor 4.9 on sampling frequency and reduces IO-delay with 37.5%. © 2013 IEEE.
Subject
Communication & Information
ESI - Embedded Systems Innovation
TS - Technical Sciences
Infostructures
Informatics
Information Society
Performance/programmability trade-off
PID control
Application-Specific Instruction-Set Processors (ASIPs)
Digital control
Heterogeneous multiprocessors
Industrial-scale
Performance/programmability trade-off
Platform approach
Processing elements
Sampling frequencies
Digital control systems
Microprocessor chips
Systems analysis
Three term control systems
Field programmable gate arrays (FPGA)
To reference this document use:
http://resolver.tudelft.nl/uuid:fad7d31d-5b4d-491b-9804-73c39e1d4bce
DOI
https://doi.org/10.1109/dsd.2013.126
TNO identifier
485657
ISBN
9780769550749
Source
16th Euromicro Conference on Digital System Design, DSD 2013, 4 September 2013 through 6 September 2013, Santander, 811-814
Article number
6628363
Document type
conference paper