Print Email Facebook Twitter Unipolar organic transistor circuits made robust by dual-gate technology Title Unipolar organic transistor circuits made robust by dual-gate technology Author Myny, K. Beenhakkers, M.J. van Aerle, N.A.J.M. Gelinck, G.H. Genoe, J. Dehaene, W. Heremans, P. Publication year 2011 Abstract Dual-gate organic transistor technology is used to increase the robustness of digital circuits as illustrated by higher inverter gains and noise margins. The additional gate in the technology functions as a VT-control gate. Both zero-VGS-load and diode-load logic are investigated. The noise margin of zero- VGS-load inverter increases from 1.15 V (single gate) to 2.8 V (dual gate) at 20 V supply voltage. Diode-load logic inverters show an improvement in noise margin from ~0 V to 0.7 V for single gate and dual gate inverters, respectively. These values can be increased significantly by optimizing the inverter topologies. As a result of this optimization, noise margins larger than 6 V for zero- V GS-load logic and 1.4 V for diode-load logic are obtained. Functional 99-stage ring oscillators with 2.27 µs stage delays and 64 bit organic RFID transponder chips, operating at a data rate of 4.3 kb/s, have been manufactured. Subject Mechatronics, Mechanics & MaterialsHOL - HolstTS - Technical SciencesElectronicsIndustrial InnovationDual-gateOrganic circuitsOrganic RFIDOrganic transistorControl gatesData ratesGate technologyInverter topologiesNoise marginsRFID transpondersSingle gatesStage ring oscillatorsSupply voltagesCryptographyDigital integrated circuitsDiodesOptimizationOscillators (electronic)Transistors To reference this document use: http://resolver.tudelft.nl/uuid:f317b7cf-51db-47ba-9c5e-b184efc85a23 TNO identifier 429745 ISSN 0018-9200 Source IEEE Journal of Solid-State Circuits, 46 (5), 1223-1230 Article number No.: 5733376 Document type article Files To receive the publication files, please send an e-mail request to TNO Library.