Title
Advance in silicon phased-array receiver IC's
Author
van Vliet, F.E.
Klumperink, E.A.M.
Soer, M.C.M.
Garakoui, S.K.
de Boer, A.
de Hek, A.P.
de Heij, W.
Nauta, B.
Publication year
2012
Abstract
Phased-Arrays are increasingly used, and require Silicon implementations to result in affordable multi-beam systems. In this paper, CMOS implementations of two novel analogue beamforming multi-channel receivers will be presented. A narrow-band highly linear system exploiting switches and capacitors in advanced CMOS is presented, implementing a fully passive switched capacitor vector modulator exploiting a zero-IF I/Q mixer: This technique is not applicable to very wideband phased-array receivers. These systems require true-time delay beamforming, which is implemented in the second CMOS implementation. An innovative gm-RC implementation of a true-time delay cell is exploited in a four-channel beamforming receiver with more than L.5 GHz bandwidth, in a standard 0.13 um CMOS process. Professional phased-arrays can often not live with the dynamic range limitations imposed by these implementations. To that end a SiGe implementation of an integrated receiver was realized targeting a digital beamforming phased-array. Dynamic range and flexibility of use were the main driving factors. Alltogether, these results show large progress with respect to the feasibility of Silicon-based phased-array front-end implementation for commercial as well as professional phased-arrays. © 2012 IEEE.
Subject
Physics & Electronics
RT - Radar Technology
TS - Technical Sciences
Defence Research
Defence, Safety and Security
Beamforming
BiCMOS
CMOS
Integrated receiver
Phased-Array
To reference this document use:
http://resolver.tudelft.nl/uuid:f05385cc-9883-43e7-ae45-e192d96dea79
DOI
https://doi.org/10.1109/mwsym.2012.6259603
TNO identifier
464532
Source
2012 IEEE MTT-S International Microwave Symposium, IMS 2012, 17-22 June 2012, Montreal, QC, Canada
Document type
conference paper