Title
1000-Pixels per Inch Transistor Arrays Using Multi-Level Imprint Lithography
Author
Dogan, T.
de Riet, J.
Bel, T.
Katsouras, I.
Witczak, L.
Kronemeijer, A.J.
Janssen, R.A.
Gelinck, G.H.
Publication year
2020
Abstract
Sub-micrometer thin-film transistors (TFTs) are realized using multi-level imprint lithography. Amorphous indium gallium zinc oxide (α-IGZO) TFTs with channel lengths as small as 0.7 μm, field-effect mobility of 10 cm2 V−1 s−1 and on/off ratio of circa 107 were integrated into a 1000-pixels per inch (ppi) TFT backplane array. The reduction of the number of patterning steps and the inherent self-registration of the most critical transistor layers on top of each other offer a cost-effective high-throughput fabrication route for high-resolution TFT arrays.
Subject
Industrial Innovation
High-resolution thin film transistor array
Amorphous Indium Gallium Zinc Oxide thin film transistor
Multi-level nanoimprint lithography
To reference this document use:
http://resolver.tudelft.nl/uuid:ceb6345d-185d-4c49-a629-9dbe002120dd
DOI
https://doi.org/10.1109/led.2020.3006343
TNO identifier
880331
Publisher
IEEE
ISSN
0741-3106
Source
IEEE Electron device letters, 41 (8), 1217-1220
Document type
article