Partial-Order Reduction for Supervisory Controller Synthesis

Partial-Order Reduction for Supervisory Controller Synthesis

van der Sanden, B.
Geilen, M.
Reniers, M.
Basten, T.

2021

One of the main challenges in the synthesis and analysis of supervisory controllers is the impact of state-space explosion caused by concurrency. The main bottleneck is often the memory needed to store the composition of plant and requirement automata and the resulting supervisor. Partial-order reduction is a well-established technique in the field of model checking that alleviates this issue. It does so by exploiting redundancy in the model with respect to the properties that are considered. In the context of controller synthesis these properties are nonblockingness, controllability, and least-restrictiveness. For performance analysis of controllers, we consider throughput and latency. We propose an on-the-fly partial-order reduction on the input model that preserves both synthesis and performance properties in the synthesized supervisory controller. This improves scalability of both the synthesis and performance analysis steps. Experiments show the effectiveness of the method on a set of realistic manufacturing system models.

Aerospace electronics
Automata
Performance analysis
Redundancy
Scalability
Throughput
Timing
Industrial Innovation

http://resolver.tudelft.nl/uuid:6f8561b3-fd9f-4928-8a4c-f468a38d0ede

https://doi.org/10.1109/tac.2021.3129161

962667

IEEE

0018-9286

IEEE Transactions on Automatic Control

conference paper